381 CONSTANT_REGISTER_DECLARATION(SpecialRegister, SR_PPR, (5));
382
383 #ifndef DONT_USE_REGISTER_DEFINES
384 #define SR_XER ((SpecialRegister)(SR_XER_SpecialRegisterEnumValue))
385 #define SR_LR ((SpecialRegister)(SR_LR_SpecialRegisterEnumValue))
386 #define SR_CTR ((SpecialRegister)(SR_CTR_SpecialRegisterEnumValue))
387 #define SR_VRSAVE ((SpecialRegister)(SR_VRSAVE_SpecialRegisterEnumValue))
388 #define SR_SPEFSCR ((SpecialRegister)(SR_SPEFSCR_SpecialRegisterEnumValue))
389 #define SR_PPR ((SpecialRegister)(SR_PPR_SpecialRegisterEnumValue))
390 #endif // DONT_USE_REGISTER_DEFINES
391
392
393 // Use VectorRegister as shortcut
394 class VectorRegisterImpl;
395 typedef VectorRegisterImpl* VectorRegister;
396
397 inline VectorRegister as_VectorRegister(int encoding) {
398 return (VectorRegister)(intptr_t)encoding;
399 }
400
401 // The implementation of vector registers for the Power architecture
402 class VectorRegisterImpl: public AbstractRegisterImpl {
403 public:
404 enum {
405 number_of_registers = 32
406 };
407
408 // construction
409 inline friend VectorRegister as_VectorRegister(int encoding);
410
411 // accessors
412 int encoding() const { assert(is_valid(), "invalid register"); return value(); }
413
414 // testers
415 bool is_valid() const { return 0 <= value() && value() < number_of_registers; }
416
417 const char* name() const;
418 };
419
420 // The Vector registers of the Power architecture
421
422 CONSTANT_REGISTER_DECLARATION(VectorRegister, vnoreg, (-1));
423
424 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR0, ( 0));
425 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR1, ( 1));
426 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR2, ( 2));
427 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR3, ( 3));
428 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR4, ( 4));
429 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR5, ( 5));
430 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR6, ( 6));
431 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR7, ( 7));
432 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR8, ( 8));
433 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR9, ( 9));
434 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR10, (10));
435 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR11, (11));
436 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR12, (12));
437 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR13, (13));
474 #define VR15 ((VectorRegister)( VR15_VectorRegisterEnumValue))
475 #define VR16 ((VectorRegister)( VR16_VectorRegisterEnumValue))
476 #define VR17 ((VectorRegister)( VR17_VectorRegisterEnumValue))
477 #define VR18 ((VectorRegister)( VR18_VectorRegisterEnumValue))
478 #define VR19 ((VectorRegister)( VR19_VectorRegisterEnumValue))
479 #define VR20 ((VectorRegister)( VR20_VectorRegisterEnumValue))
480 #define VR21 ((VectorRegister)( VR21_VectorRegisterEnumValue))
481 #define VR22 ((VectorRegister)( VR22_VectorRegisterEnumValue))
482 #define VR23 ((VectorRegister)( VR23_VectorRegisterEnumValue))
483 #define VR24 ((VectorRegister)( VR24_VectorRegisterEnumValue))
484 #define VR25 ((VectorRegister)( VR25_VectorRegisterEnumValue))
485 #define VR26 ((VectorRegister)( VR26_VectorRegisterEnumValue))
486 #define VR27 ((VectorRegister)( VR27_VectorRegisterEnumValue))
487 #define VR28 ((VectorRegister)( VR28_VectorRegisterEnumValue))
488 #define VR29 ((VectorRegister)( VR29_VectorRegisterEnumValue))
489 #define VR30 ((VectorRegister)( VR30_VectorRegisterEnumValue))
490 #define VR31 ((VectorRegister)( VR31_VectorRegisterEnumValue))
491 #endif // DONT_USE_REGISTER_DEFINES
492
493
494 // Use VectorSRegister as a shortcut.
495 class VectorSRegisterImpl;
496 typedef VectorSRegisterImpl* VectorSRegister;
497
498 inline VectorSRegister as_VectorSRegister(int encoding) {
499 return (VectorSRegister)(intptr_t)encoding;
500 }
501
502 // The implementation of Vector-Scalar (VSX) registers on POWER architecture.
503 class VectorSRegisterImpl: public AbstractRegisterImpl {
504 public:
505 enum {
506 number_of_registers = 32
507 };
508
509 // construction
510 inline friend VectorSRegister as_VectorSRegister(int encoding);
511
512 // accessors
513 int encoding() const { assert(is_valid(), "invalid register"); return value(); }
514
515 // testers
516 bool is_valid() const { return 0 <= value() && value() < number_of_registers; }
517
518 const char* name() const;
519 };
520
521 // The Vector-Scalar (VSX) registers of the POWER architecture.
522
523 CONSTANT_REGISTER_DECLARATION(VectorSRegister, vsnoreg, (-1));
524
525 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR0, ( 0));
526 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR1, ( 1));
537 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR12, (12));
538 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR13, (13));
539 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR14, (14));
540 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR15, (15));
541 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR16, (16));
542 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR17, (17));
543 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR18, (18));
544 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR19, (19));
545 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR20, (20));
546 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR21, (21));
547 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR22, (22));
548 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR23, (23));
549 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR24, (24));
550 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR25, (25));
551 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR26, (26));
552 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR27, (27));
553 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR28, (28));
554 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR29, (29));
555 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR30, (30));
556 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR31, (31));
557
558 #ifndef DONT_USE_REGISTER_DEFINES
559 #define vsnoregi ((VectorSRegister)(vsnoreg_VectorSRegisterEnumValue))
560 #define VSR0 ((VectorSRegister)( VSR0_VectorSRegisterEnumValue))
561 #define VSR1 ((VectorSRegister)( VSR1_VectorSRegisterEnumValue))
562 #define VSR2 ((VectorSRegister)( VSR2_VectorSRegisterEnumValue))
563 #define VSR3 ((VectorSRegister)( VSR3_VectorSRegisterEnumValue))
564 #define VSR4 ((VectorSRegister)( VSR4_VectorSRegisterEnumValue))
565 #define VSR5 ((VectorSRegister)( VSR5_VectorSRegisterEnumValue))
566 #define VSR6 ((VectorSRegister)( VSR6_VectorSRegisterEnumValue))
567 #define VSR7 ((VectorSRegister)( VSR7_VectorSRegisterEnumValue))
568 #define VSR8 ((VectorSRegister)( VSR8_VectorSRegisterEnumValue))
569 #define VSR9 ((VectorSRegister)( VSR9_VectorSRegisterEnumValue))
570 #define VSR10 ((VectorSRegister)( VSR10_VectorSRegisterEnumValue))
571 #define VSR11 ((VectorSRegister)( VSR11_VectorSRegisterEnumValue))
572 #define VSR12 ((VectorSRegister)( VSR12_VectorSRegisterEnumValue))
573 #define VSR13 ((VectorSRegister)( VSR13_VectorSRegisterEnumValue))
574 #define VSR14 ((VectorSRegister)( VSR14_VectorSRegisterEnumValue))
575 #define VSR15 ((VectorSRegister)( VSR15_VectorSRegisterEnumValue))
576 #define VSR16 ((VectorSRegister)( VSR16_VectorSRegisterEnumValue))
577 #define VSR17 ((VectorSRegister)( VSR17_VectorSRegisterEnumValue))
578 #define VSR18 ((VectorSRegister)( VSR18_VectorSRegisterEnumValue))
579 #define VSR19 ((VectorSRegister)( VSR19_VectorSRegisterEnumValue))
580 #define VSR20 ((VectorSRegister)( VSR20_VectorSRegisterEnumValue))
581 #define VSR21 ((VectorSRegister)( VSR21_VectorSRegisterEnumValue))
582 #define VSR22 ((VectorSRegister)( VSR22_VectorSRegisterEnumValue))
583 #define VSR23 ((VectorSRegister)( VSR23_VectorSRegisterEnumValue))
584 #define VSR24 ((VectorSRegister)( VSR24_VectorSRegisterEnumValue))
585 #define VSR25 ((VectorSRegister)( VSR25_VectorSRegisterEnumValue))
586 #define VSR26 ((VectorSRegister)( VSR26_VectorSRegisterEnumValue))
587 #define VSR27 ((VectorSRegister)( VSR27_VectorSRegisterEnumValue))
588 #define VSR28 ((VectorSRegister)( VSR28_VectorSRegisterEnumValue))
589 #define VSR29 ((VectorSRegister)( VSR29_VectorSRegisterEnumValue))
590 #define VSR30 ((VectorSRegister)( VSR30_VectorSRegisterEnumValue))
591 #define VSR31 ((VectorSRegister)( VSR31_VectorSRegisterEnumValue))
592 #endif // DONT_USE_REGISTER_DEFINES
593
594 // Maximum number of incoming arguments that can be passed in i registers.
595 const int PPC_ARGS_IN_REGS_NUM = 8;
596
597
598 // Need to know the total number of registers of all sorts for SharedInfo.
599 // Define a class that exports it.
600 class ConcreteRegisterImpl : public AbstractRegisterImpl {
601 public:
602 enum {
603 // This number must be large enough to cover REG_COUNT (defined by c2) registers.
604 // There is no requirement that any ordering here matches any ordering c2 gives
605 // it's optoregs.
606 number_of_registers =
607 ( RegisterImpl::number_of_registers +
608 FloatRegisterImpl::number_of_registers )
609 * 2 // register halves
610 + ConditionRegisterImpl::number_of_registers // condition code registers
611 + SpecialRegisterImpl::number_of_registers // special registers
612 + VectorRegisterImpl::number_of_registers // vector registers
613 };
614
615 static const int max_gpr;
616 static const int max_fpr;
617 static const int max_cnd;
618 };
619
620 // Common register declarations used in assembler code.
621 REGISTER_DECLARATION(Register, R0_SCRATCH, R0); // volatile
622 REGISTER_DECLARATION(Register, R1_SP, R1); // non-volatile
623 REGISTER_DECLARATION(Register, R2_TOC, R2); // volatile
624 REGISTER_DECLARATION(Register, R3_RET, R3); // volatile
625 REGISTER_DECLARATION(Register, R3_ARG1, R3); // volatile
626 REGISTER_DECLARATION(Register, R4_ARG2, R4); // volatile
627 REGISTER_DECLARATION(Register, R5_ARG3, R5); // volatile
628 REGISTER_DECLARATION(Register, R6_ARG4, R6); // volatile
629 REGISTER_DECLARATION(Register, R7_ARG5, R7); // volatile
630 REGISTER_DECLARATION(Register, R8_ARG6, R8); // volatile
631 REGISTER_DECLARATION(Register, R9_ARG7, R9); // volatile
632 REGISTER_DECLARATION(Register, R10_ARG8, R10); // volatile
|
381 CONSTANT_REGISTER_DECLARATION(SpecialRegister, SR_PPR, (5));
382
383 #ifndef DONT_USE_REGISTER_DEFINES
384 #define SR_XER ((SpecialRegister)(SR_XER_SpecialRegisterEnumValue))
385 #define SR_LR ((SpecialRegister)(SR_LR_SpecialRegisterEnumValue))
386 #define SR_CTR ((SpecialRegister)(SR_CTR_SpecialRegisterEnumValue))
387 #define SR_VRSAVE ((SpecialRegister)(SR_VRSAVE_SpecialRegisterEnumValue))
388 #define SR_SPEFSCR ((SpecialRegister)(SR_SPEFSCR_SpecialRegisterEnumValue))
389 #define SR_PPR ((SpecialRegister)(SR_PPR_SpecialRegisterEnumValue))
390 #endif // DONT_USE_REGISTER_DEFINES
391
392
393 // Use VectorRegister as shortcut
394 class VectorRegisterImpl;
395 typedef VectorRegisterImpl* VectorRegister;
396
397 inline VectorRegister as_VectorRegister(int encoding) {
398 return (VectorRegister)(intptr_t)encoding;
399 }
400
401 // Forward declaration
402 // Use VectorSRegister as a shortcut.
403 class VectorSRegisterImpl;
404 typedef VectorSRegisterImpl* VectorSRegister;
405
406 // The implementation of vector registers for the Power architecture
407 class VectorRegisterImpl: public AbstractRegisterImpl {
408 public:
409 enum {
410 number_of_registers = 32
411 };
412
413 // construction
414 inline friend VectorRegister as_VectorRegister(int encoding);
415
416 // accessors
417 int encoding() const { assert(is_valid(), "invalid register"); return value(); }
418
419 // testers
420 bool is_valid() const { return 0 <= value() && value() < number_of_registers; }
421
422 const char* name() const;
423
424 // convert to VSR
425 VectorSRegister to_vsr() const;
426 };
427
428 // The Vector registers of the Power architecture
429
430 CONSTANT_REGISTER_DECLARATION(VectorRegister, vnoreg, (-1));
431
432 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR0, ( 0));
433 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR1, ( 1));
434 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR2, ( 2));
435 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR3, ( 3));
436 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR4, ( 4));
437 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR5, ( 5));
438 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR6, ( 6));
439 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR7, ( 7));
440 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR8, ( 8));
441 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR9, ( 9));
442 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR10, (10));
443 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR11, (11));
444 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR12, (12));
445 CONSTANT_REGISTER_DECLARATION(VectorRegister, VR13, (13));
482 #define VR15 ((VectorRegister)( VR15_VectorRegisterEnumValue))
483 #define VR16 ((VectorRegister)( VR16_VectorRegisterEnumValue))
484 #define VR17 ((VectorRegister)( VR17_VectorRegisterEnumValue))
485 #define VR18 ((VectorRegister)( VR18_VectorRegisterEnumValue))
486 #define VR19 ((VectorRegister)( VR19_VectorRegisterEnumValue))
487 #define VR20 ((VectorRegister)( VR20_VectorRegisterEnumValue))
488 #define VR21 ((VectorRegister)( VR21_VectorRegisterEnumValue))
489 #define VR22 ((VectorRegister)( VR22_VectorRegisterEnumValue))
490 #define VR23 ((VectorRegister)( VR23_VectorRegisterEnumValue))
491 #define VR24 ((VectorRegister)( VR24_VectorRegisterEnumValue))
492 #define VR25 ((VectorRegister)( VR25_VectorRegisterEnumValue))
493 #define VR26 ((VectorRegister)( VR26_VectorRegisterEnumValue))
494 #define VR27 ((VectorRegister)( VR27_VectorRegisterEnumValue))
495 #define VR28 ((VectorRegister)( VR28_VectorRegisterEnumValue))
496 #define VR29 ((VectorRegister)( VR29_VectorRegisterEnumValue))
497 #define VR30 ((VectorRegister)( VR30_VectorRegisterEnumValue))
498 #define VR31 ((VectorRegister)( VR31_VectorRegisterEnumValue))
499 #endif // DONT_USE_REGISTER_DEFINES
500
501
502 inline VectorSRegister as_VectorSRegister(int encoding) {
503 return (VectorSRegister)(intptr_t)encoding;
504 }
505
506 // The implementation of Vector-Scalar (VSX) registers on POWER architecture.
507 class VectorSRegisterImpl: public AbstractRegisterImpl {
508 public:
509 enum {
510 number_of_registers = 64
511 };
512
513 // construction
514 inline friend VectorSRegister as_VectorSRegister(int encoding);
515
516 // accessors
517 int encoding() const { assert(is_valid(), "invalid register"); return value(); }
518
519 // testers
520 bool is_valid() const { return 0 <= value() && value() < number_of_registers; }
521
522 const char* name() const;
523 };
524
525 // The Vector-Scalar (VSX) registers of the POWER architecture.
526
527 CONSTANT_REGISTER_DECLARATION(VectorSRegister, vsnoreg, (-1));
528
529 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR0, ( 0));
530 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR1, ( 1));
541 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR12, (12));
542 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR13, (13));
543 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR14, (14));
544 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR15, (15));
545 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR16, (16));
546 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR17, (17));
547 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR18, (18));
548 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR19, (19));
549 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR20, (20));
550 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR21, (21));
551 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR22, (22));
552 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR23, (23));
553 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR24, (24));
554 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR25, (25));
555 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR26, (26));
556 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR27, (27));
557 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR28, (28));
558 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR29, (29));
559 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR30, (30));
560 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR31, (31));
561 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR32, (32));
562 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR33, (33));
563 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR34, (34));
564 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR35, (35));
565 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR36, (36));
566 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR37, (37));
567 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR38, (38));
568 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR39, (39));
569 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR40, (40));
570 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR41, (41));
571 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR42, (42));
572 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR43, (43));
573 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR44, (44));
574 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR45, (45));
575 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR46, (46));
576 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR47, (47));
577 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR48, (48));
578 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR49, (49));
579 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR50, (50));
580 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR51, (51));
581 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR52, (52));
582 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR53, (53));
583 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR54, (54));
584 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR55, (55));
585 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR56, (56));
586 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR57, (57));
587 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR58, (58));
588 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR59, (59));
589 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR60, (60));
590 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR61, (61));
591 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR62, (62));
592 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR63, (63));
593
594 #ifndef DONT_USE_REGISTER_DEFINES
595 #define vsnoregi ((VectorSRegister)(vsnoreg_VectorSRegisterEnumValue))
596 #define VSR0 ((VectorSRegister)( VSR0_VectorSRegisterEnumValue))
597 #define VSR1 ((VectorSRegister)( VSR1_VectorSRegisterEnumValue))
598 #define VSR2 ((VectorSRegister)( VSR2_VectorSRegisterEnumValue))
599 #define VSR3 ((VectorSRegister)( VSR3_VectorSRegisterEnumValue))
600 #define VSR4 ((VectorSRegister)( VSR4_VectorSRegisterEnumValue))
601 #define VSR5 ((VectorSRegister)( VSR5_VectorSRegisterEnumValue))
602 #define VSR6 ((VectorSRegister)( VSR6_VectorSRegisterEnumValue))
603 #define VSR7 ((VectorSRegister)( VSR7_VectorSRegisterEnumValue))
604 #define VSR8 ((VectorSRegister)( VSR8_VectorSRegisterEnumValue))
605 #define VSR9 ((VectorSRegister)( VSR9_VectorSRegisterEnumValue))
606 #define VSR10 ((VectorSRegister)( VSR10_VectorSRegisterEnumValue))
607 #define VSR11 ((VectorSRegister)( VSR11_VectorSRegisterEnumValue))
608 #define VSR12 ((VectorSRegister)( VSR12_VectorSRegisterEnumValue))
609 #define VSR13 ((VectorSRegister)( VSR13_VectorSRegisterEnumValue))
610 #define VSR14 ((VectorSRegister)( VSR14_VectorSRegisterEnumValue))
611 #define VSR15 ((VectorSRegister)( VSR15_VectorSRegisterEnumValue))
612 #define VSR16 ((VectorSRegister)( VSR16_VectorSRegisterEnumValue))
613 #define VSR17 ((VectorSRegister)( VSR17_VectorSRegisterEnumValue))
614 #define VSR18 ((VectorSRegister)( VSR18_VectorSRegisterEnumValue))
615 #define VSR19 ((VectorSRegister)( VSR19_VectorSRegisterEnumValue))
616 #define VSR20 ((VectorSRegister)( VSR20_VectorSRegisterEnumValue))
617 #define VSR21 ((VectorSRegister)( VSR21_VectorSRegisterEnumValue))
618 #define VSR22 ((VectorSRegister)( VSR22_VectorSRegisterEnumValue))
619 #define VSR23 ((VectorSRegister)( VSR23_VectorSRegisterEnumValue))
620 #define VSR24 ((VectorSRegister)( VSR24_VectorSRegisterEnumValue))
621 #define VSR25 ((VectorSRegister)( VSR25_VectorSRegisterEnumValue))
622 #define VSR26 ((VectorSRegister)( VSR26_VectorSRegisterEnumValue))
623 #define VSR27 ((VectorSRegister)( VSR27_VectorSRegisterEnumValue))
624 #define VSR28 ((VectorSRegister)( VSR28_VectorSRegisterEnumValue))
625 #define VSR29 ((VectorSRegister)( VSR29_VectorSRegisterEnumValue))
626 #define VSR30 ((VectorSRegister)( VSR30_VectorSRegisterEnumValue))
627 #define VSR31 ((VectorSRegister)( VSR31_VectorSRegisterEnumValue))
628 #define VSR32 ((VectorSRegister)( VSR32_VectorSRegisterEnumValue))
629 #define VSR33 ((VectorSRegister)( VSR33_VectorSRegisterEnumValue))
630 #define VSR34 ((VectorSRegister)( VSR34_VectorSRegisterEnumValue))
631 #define VSR35 ((VectorSRegister)( VSR35_VectorSRegisterEnumValue))
632 #define VSR36 ((VectorSRegister)( VSR36_VectorSRegisterEnumValue))
633 #define VSR37 ((VectorSRegister)( VSR37_VectorSRegisterEnumValue))
634 #define VSR38 ((VectorSRegister)( VSR38_VectorSRegisterEnumValue))
635 #define VSR39 ((VectorSRegister)( VSR39_VectorSRegisterEnumValue))
636 #define VSR40 ((VectorSRegister)( VSR40_VectorSRegisterEnumValue))
637 #define VSR41 ((VectorSRegister)( VSR41_VectorSRegisterEnumValue))
638 #define VSR42 ((VectorSRegister)( VSR42_VectorSRegisterEnumValue))
639 #define VSR43 ((VectorSRegister)( VSR43_VectorSRegisterEnumValue))
640 #define VSR44 ((VectorSRegister)( VSR44_VectorSRegisterEnumValue))
641 #define VSR45 ((VectorSRegister)( VSR45_VectorSRegisterEnumValue))
642 #define VSR46 ((VectorSRegister)( VSR46_VectorSRegisterEnumValue))
643 #define VSR47 ((VectorSRegister)( VSR47_VectorSRegisterEnumValue))
644 #define VSR48 ((VectorSRegister)( VSR48_VectorSRegisterEnumValue))
645 #define VSR49 ((VectorSRegister)( VSR49_VectorSRegisterEnumValue))
646 #define VSR50 ((VectorSRegister)( VSR50_VectorSRegisterEnumValue))
647 #define VSR51 ((VectorSRegister)( VSR51_VectorSRegisterEnumValue))
648 #define VSR52 ((VectorSRegister)( VSR52_VectorSRegisterEnumValue))
649 #define VSR53 ((VectorSRegister)( VSR53_VectorSRegisterEnumValue))
650 #define VSR54 ((VectorSRegister)( VSR54_VectorSRegisterEnumValue))
651 #define VSR55 ((VectorSRegister)( VSR55_VectorSRegisterEnumValue))
652 #define VSR56 ((VectorSRegister)( VSR56_VectorSRegisterEnumValue))
653 #define VSR57 ((VectorSRegister)( VSR57_VectorSRegisterEnumValue))
654 #define VSR58 ((VectorSRegister)( VSR58_VectorSRegisterEnumValue))
655 #define VSR59 ((VectorSRegister)( VSR59_VectorSRegisterEnumValue))
656 #define VSR60 ((VectorSRegister)( VSR60_VectorSRegisterEnumValue))
657 #define VSR61 ((VectorSRegister)( VSR61_VectorSRegisterEnumValue))
658 #define VSR62 ((VectorSRegister)( VSR62_VectorSRegisterEnumValue))
659 #define VSR63 ((VectorSRegister)( VSR63_VectorSRegisterEnumValue))
660 #endif // DONT_USE_REGISTER_DEFINES
661
662 // Maximum number of incoming arguments that can be passed in i registers.
663 const int PPC_ARGS_IN_REGS_NUM = 8;
664
665
666 // Need to know the total number of registers of all sorts for SharedInfo.
667 // Define a class that exports it.
668 class ConcreteRegisterImpl : public AbstractRegisterImpl {
669 public:
670 enum {
671 // This number must be large enough to cover REG_COUNT (defined by c2) registers.
672 // There is no requirement that any ordering here matches any ordering c2 gives
673 // it's optoregs.
674 number_of_registers =
675 ( RegisterImpl::number_of_registers +
676 FloatRegisterImpl::number_of_registers )
677 * 2 // register halves
678 + ConditionRegisterImpl::number_of_registers // condition code registers
679 + SpecialRegisterImpl::number_of_registers // special registers
680 + VectorRegisterImpl::number_of_registers // VSX registers
681 };
682
683 static const int max_gpr;
684 static const int max_fpr;
685 static const int max_cnd;
686 };
687
688 // Common register declarations used in assembler code.
689 REGISTER_DECLARATION(Register, R0_SCRATCH, R0); // volatile
690 REGISTER_DECLARATION(Register, R1_SP, R1); // non-volatile
691 REGISTER_DECLARATION(Register, R2_TOC, R2); // volatile
692 REGISTER_DECLARATION(Register, R3_RET, R3); // volatile
693 REGISTER_DECLARATION(Register, R3_ARG1, R3); // volatile
694 REGISTER_DECLARATION(Register, R4_ARG2, R4); // volatile
695 REGISTER_DECLARATION(Register, R5_ARG3, R5); // volatile
696 REGISTER_DECLARATION(Register, R6_ARG4, R6); // volatile
697 REGISTER_DECLARATION(Register, R7_ARG5, R7); // volatile
698 REGISTER_DECLARATION(Register, R8_ARG6, R8); // volatile
699 REGISTER_DECLARATION(Register, R9_ARG7, R9); // volatile
700 REGISTER_DECLARATION(Register, R10_ARG8, R10); // volatile
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