hotspot Sdiff src/cpu/ppc/vm

src/cpu/ppc/vm/c1_FrameMap_ppc.hpp

rev 12310 : Reserve R30 to a cleared content register on C1 and C2 code

Several times a 0 is loaded to a register as a temporary value. This can be
improved by caching a 0 into a register.

I didn't notice a performance drop since only applying this patch showed no
drop of performance, hence there are more registers available than normally
needed and this caching technique can be applied.

Despite setting R30_zero as a dedicated register and initialized with 0 for the
C1 and C2 code, new rules for storing 0 related to stb,sth,stw,std were added.

  83   static LIR_Opr R11_oop_opr;
  84   static LIR_Opr R12_oop_opr;
  85   //R13: System thread register. Not usable.
  86   static LIR_Opr R14_oop_opr;
  87   static LIR_Opr R15_oop_opr;
  88   //R16: Java thread register. Not an oop.
  89   static LIR_Opr R17_oop_opr;
  90   static LIR_Opr R18_oop_opr;
  91   static LIR_Opr R19_oop_opr;
  92   static LIR_Opr R20_oop_opr;
  93   static LIR_Opr R21_oop_opr;
  94   static LIR_Opr R22_oop_opr;
  95   static LIR_Opr R23_oop_opr;
  96   static LIR_Opr R24_oop_opr;
  97   static LIR_Opr R25_oop_opr;
  98   static LIR_Opr R26_oop_opr;
  99   static LIR_Opr R27_oop_opr;
 100   static LIR_Opr R28_oop_opr;
 101   static LIR_Opr R29_oop_opr;
 102   //R29: TOC register. Not an oop.
 103   static LIR_Opr R30_oop_opr;
 104   static LIR_Opr R31_oop_opr;
 105 
 106   static LIR_Opr  R0_metadata_opr;
 107   //R1: Stack pointer. Not metadata.
 108   static LIR_Opr  R2_metadata_opr;
 109   static LIR_Opr  R3_metadata_opr;
 110   static LIR_Opr  R4_metadata_opr;
 111   static LIR_Opr  R5_metadata_opr;
 112   static LIR_Opr  R6_metadata_opr;
 113   static LIR_Opr  R7_metadata_opr;
 114   static LIR_Opr  R8_metadata_opr;
 115   static LIR_Opr  R9_metadata_opr;
 116   static LIR_Opr R10_metadata_opr;
 117   static LIR_Opr R11_metadata_opr;
 118   static LIR_Opr R12_metadata_opr;
 119   //R13: System thread register. Not usable.
 120   static LIR_Opr R14_metadata_opr;
 121   static LIR_Opr R15_metadata_opr;
 122   //R16: Java thread register. Not metadata.
 123   static LIR_Opr R17_metadata_opr;
 124   static LIR_Opr R18_metadata_opr;
 125   static LIR_Opr R19_metadata_opr;
 126   static LIR_Opr R20_metadata_opr;
 127   static LIR_Opr R21_metadata_opr;
 128   static LIR_Opr R22_metadata_opr;
 129   static LIR_Opr R23_metadata_opr;
 130   static LIR_Opr R24_metadata_opr;
 131   static LIR_Opr R25_metadata_opr;
 132   static LIR_Opr R26_metadata_opr;
 133   static LIR_Opr R27_metadata_opr;
 134   static LIR_Opr R28_metadata_opr;
 135   //R29: TOC register. Not metadata.
 136   static LIR_Opr R30_metadata_opr;
 137   static LIR_Opr R31_metadata_opr;
 138 
 139   static LIR_Opr SP_opr;
 140 
 141   static LIR_Opr R0_long_opr;
 142   static LIR_Opr R3_long_opr;
 143 
 144   static LIR_Opr F1_opr;
 145   static LIR_Opr F1_double_opr;
 146 
 147  private:
 148   static FloatRegister  _fpu_regs [nof_fpu_regs];
 149 
 150   static LIR_Opr as_long_single_opr(Register r) {
 151     return LIR_OprFact::double_cpu(cpu_reg2rnr(r), cpu_reg2rnr(r));
 152   }
 153   static LIR_Opr as_long_pair_opr(Register r) {
 154     return LIR_OprFact::double_cpu(cpu_reg2rnr(r->successor()), cpu_reg2rnr(r));
 155   }
 156

 180     return LIR_OprFact::double_fpu(r->encoding());
 181   }
 182 
 183   static FloatRegister nr2floatreg (int rnr);
 184 
 185   static VMReg fpu_regname (int n);
 186 
 187   static bool is_caller_save_register(LIR_Opr  reg);
 188   static bool is_caller_save_register(Register r);
 189 
 190   static int nof_caller_save_cpu_regs() { return pd_nof_caller_save_cpu_regs_frame_map; }
 191   static int last_cpu_reg()             { return pd_last_cpu_reg; }
 192 
 193   // Registers which need to be saved in the frames (e.g. for GC).
 194   // Register usage:
 195   //  R0: scratch
 196   //  R1: sp
 197   // R13: system thread id
 198   // R16: java thread
 199   // R29: global TOC
 200   static bool reg_needs_save(Register r) { return r != R0 && r != R1 && r != R13 && r != R16 && r != R29; }

 201 
 202 #endif // CPU_PPC_VM_C1_FRAMEMAP_PPC_HPP

  83   static LIR_Opr R11_oop_opr;
  84   static LIR_Opr R12_oop_opr;
  85   //R13: System thread register. Not usable.
  86   static LIR_Opr R14_oop_opr;
  87   static LIR_Opr R15_oop_opr;
  88   //R16: Java thread register. Not an oop.
  89   static LIR_Opr R17_oop_opr;
  90   static LIR_Opr R18_oop_opr;
  91   static LIR_Opr R19_oop_opr;
  92   static LIR_Opr R20_oop_opr;
  93   static LIR_Opr R21_oop_opr;
  94   static LIR_Opr R22_oop_opr;
  95   static LIR_Opr R23_oop_opr;
  96   static LIR_Opr R24_oop_opr;
  97   static LIR_Opr R25_oop_opr;
  98   static LIR_Opr R26_oop_opr;
  99   static LIR_Opr R27_oop_opr;
 100   static LIR_Opr R28_oop_opr;
 101   static LIR_Opr R29_oop_opr;
 102   //R29: TOC register. Not an oop.
 103   //R30: R30_zero. Not an oop.
 104   static LIR_Opr R31_oop_opr;
 105 
 106   static LIR_Opr  R0_metadata_opr;
 107   //R1: Stack pointer. Not metadata.
 108   static LIR_Opr  R2_metadata_opr;
 109   static LIR_Opr  R3_metadata_opr;
 110   static LIR_Opr  R4_metadata_opr;
 111   static LIR_Opr  R5_metadata_opr;
 112   static LIR_Opr  R6_metadata_opr;
 113   static LIR_Opr  R7_metadata_opr;
 114   static LIR_Opr  R8_metadata_opr;
 115   static LIR_Opr  R9_metadata_opr;
 116   static LIR_Opr R10_metadata_opr;
 117   static LIR_Opr R11_metadata_opr;
 118   static LIR_Opr R12_metadata_opr;
 119   //R13: System thread register. Not usable.
 120   static LIR_Opr R14_metadata_opr;
 121   static LIR_Opr R15_metadata_opr;
 122   //R16: Java thread register. Not metadata.
 123   static LIR_Opr R17_metadata_opr;
 124   static LIR_Opr R18_metadata_opr;
 125   static LIR_Opr R19_metadata_opr;
 126   static LIR_Opr R20_metadata_opr;
 127   static LIR_Opr R21_metadata_opr;
 128   static LIR_Opr R22_metadata_opr;
 129   static LIR_Opr R23_metadata_opr;
 130   static LIR_Opr R24_metadata_opr;
 131   static LIR_Opr R25_metadata_opr;
 132   static LIR_Opr R26_metadata_opr;
 133   static LIR_Opr R27_metadata_opr;
 134   static LIR_Opr R28_metadata_opr;
 135   //R29: TOC register. Not metadata.
 136   //R30: R30_zero. Not metadata.
 137   static LIR_Opr R31_metadata_opr;
 138 
 139   static LIR_Opr SP_opr;
 140 
 141   static LIR_Opr R0_long_opr;
 142   static LIR_Opr R3_long_opr;
 143 
 144   static LIR_Opr F1_opr;
 145   static LIR_Opr F1_double_opr;
 146 
 147  private:
 148   static FloatRegister  _fpu_regs [nof_fpu_regs];
 149 
 150   static LIR_Opr as_long_single_opr(Register r) {
 151     return LIR_OprFact::double_cpu(cpu_reg2rnr(r), cpu_reg2rnr(r));
 152   }
 153   static LIR_Opr as_long_pair_opr(Register r) {
 154     return LIR_OprFact::double_cpu(cpu_reg2rnr(r->successor()), cpu_reg2rnr(r));
 155   }
 156

 180     return LIR_OprFact::double_fpu(r->encoding());
 181   }
 182 
 183   static FloatRegister nr2floatreg (int rnr);
 184 
 185   static VMReg fpu_regname (int n);
 186 
 187   static bool is_caller_save_register(LIR_Opr  reg);
 188   static bool is_caller_save_register(Register r);
 189 
 190   static int nof_caller_save_cpu_regs() { return pd_nof_caller_save_cpu_regs_frame_map; }
 191   static int last_cpu_reg()             { return pd_last_cpu_reg; }
 192 
 193   // Registers which need to be saved in the frames (e.g. for GC).
 194   // Register usage:
 195   //  R0: scratch
 196   //  R1: sp
 197   // R13: system thread id
 198   // R16: java thread
 199   // R29: global TOC
 200   // R30: R30_zero
 201   static bool reg_needs_save(Register r) { return r != R0 && r != R1 && r != R13 && r != R16 && r != R29 && r != R30; }
 202 
 203 #endif // CPU_PPC_VM_C1_FRAMEMAP_PPC_HPP

< prev index next >